Renesas Electronics RC32514A-EVK FemtoClock™ 2 Evaluation Kit
Renesas Electronics RC32514A-EVK FemtoClock™ 2 Evaluation Kit is based on the RC32514A and RC22514A. The RC32514A-EVK board is equipped with the RC32514. The Renesas RC22514 is functionally a subset of the RC32514A so that the board can evaluate either or both devices.
Features
- Jitter below 100fs RMS (10kHz to 20MHz)
- Compliant with ITU-T G.8262 for synchronous Ethernet/OTN (EEC/OEC) and ITU-T G.8262.1 for enhanced synchronous Ethernet/OTN (eEEC/eOEC)
- PLL core consists of fractional-feedback Analog PLL (APLL), which can optionally be steered by a Digital PLL (DPLL)
- Operates from a 25MHz to 80MHz crystal or XO
- APLL frequency independent of input/crystal frequency
- Operates as a frequency synthesizer, jitter attenuator, synchronous equipment slave clock, or Digitally Controlled Oscillator (DCO)
- DPLL loop filter programmable from 0.1Hz to 12kHz
- DCO has a tuning granularity of <1ppb
- Programmable input buffer supports HCSL, LVDS, or 2x LVCMOS with no external terminations needed
- 1MHz to 800MHz input frequencies (250MHz for LVCMOS)
- Reference monitor qualifies/disqualifies input clock
- Programmable status output
- 4x differential/8x LVCMOS outputs
- Any frequency from 10MHz to 1GHz (180MHz for LVCMOS)
- Programmable output buffer supports HCSL (DC-coupled), LVDS/LVPECL/CML (AC-coupled) or 2x LVCMOS
- Differential output swing is selectable from 400mV to 800mV
- Output clock phase individually adjustable in 100ps steps
- Output Enable input with programmable effect
- Supports up to 1MHz I2C or up to 20MHz SPI serial processor port
- Can configure itself automatically after reset through internal customer-definable One-Time Programmable (OTP) memory with up to four different configurations
Associated Products
Renesas Electronics RC22514A FemtoClock™ 2 Clock Generator
Developed to be placed adjacent to a PHY, switch, ASIC, or FPGA that requires several clocks.
Additional Resources
Layout
Published: 2023-10-04
| Updated: 2023-10-23