Analog Devices Inc. ADSP-2157x Digital Signal Processors

Analog Devices ADSP-2157x Digital Signal Processors are members of the single-instruction, multiple data (SIMD) family of digital signal processors that feature Analog Devices Super Harvard Architecture (SHARC®). Analog Devices 32-bit/40-bit/64-bit floating-point processors are optimized for high-performance audio/floating-point applications with a large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and digital audio interfaces (DAI). These additions to the SHARC+® core include cache enhancements and branch prediction while maintaining instruction set compatibility to previous SHARC products.

Features

  • Dual-enhanced SHARC+ high-performance floating-point
    cores
  • Up to 500MHz per SHARC+ core
  • Up to 3Mb (384kB) L1 SRAM memory per core with parity
  • (optional ability to configure as cache)
    32-bit, 40-bit, and 64-bit floating-point support
  • 32-bit fixed point
  • Byte, short word, word, long word addressed
  • ARM Cortex-A5 core
  • 500MHz/800DMIPS with NEON/VFPv4-D16/Jazelle
  • 32kB L1 instruction cache with parity/32kB L1 data cache
    with parity
  • 256kB L2 cache with parity
  • Powerful DMA system
  • On-chip memory protection
  • Integrated safety features
  • 17mm × 17mm 400-ball CSP_BGA and 176-lead LQFP_EP, RoHS compliant
  • Low-system power across automotive temperature range
  • Cryptographic hardware accelerators
  • Fast, secure boot with IP protection
  • Support for ARM TrustZone Accelerators
  • Memory
    • Large on-chip L2 SRAM with ECC protection, up to 1MB
    • One L3 interface optimized for low system power, providing
    • 16-bit interface to DDR3 (supporting 1.5V capable DDR3L
    • devices), DDR2, or LPDDR1 SDRAM devices

Block Diagram

Block Diagram - Analog Devices Inc. ADSP-2157x Digital Signal Processors
Published: 2018-12-28 | Updated: 2023-02-14