TPS2320ID

Texas Instruments
595-TPS2320ID
TPS2320ID

Mfr.:

Description:
Hot Swap Voltage Controllers 3-13V Dual w/Ind Chl Circuit Breaking A A 595-TPS2320IDR

ECAD Model:
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In Stock: 59

Stock:
59 Can Dispatch Immediately
Factory Lead Time:
6 Weeks Estimated factory production time for quantities greater than shown.
Quantities greater than 59 will be subject to minimum order requirements.
Minimum: 1   Multiples: 1
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:

Pricing (EUR)

Qty. Unit Price
Ext. Price
5,25 € 5,25 €
4,01 € 40,10 €
3,69 € 92,25 €
3,34 € 400,80 €
3,17 € 887,60 €
3,08 € 1.601,60 €
3,04 € 3.040,00 €
3,00 € 7.560,00 €

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Hot Swap Voltage Controllers
RoHS:  
Controllers & Switches
Programmable
13 V
3 V
2 Channel
200 uA, 1 mA
- 40 C
+ 85 C
SMD/SMT
SOIC-Narrow-16
Tube
No
Brand: Texas Instruments
Product Type: Hot Swap Voltage Controllers
Series: TPS2320
Factory Pack Quantity: 40
Subcategory: PMIC - Power Management ICs
Unit Weight: 141,700 mg
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Compliance Codes
TARIC:
8542399000
CNHTS:
8542319090
CAHTS:
8542390000
USHTS:
8542390090
JPHTS:
8542390990
MXHTS:
85423999
ECCN:
EAR99
Origin Classifications
Country of Origin:
Mexico
Assembly Country of Origin:
Not available
Country of Diffusion:
Not available
The country is subject to change at the time of shipment.

LM5060 High-Side Protection Controllers

Texas Instruments LM5060 High-Side Protection Controllers with Low Quiescent Current offers intelligent control of a high-side N-channel MOSFET during normal on/off transitions and fault conditions. The constant rise time of the output voltage results from the inrush current control. Both an Input UVLO (with hysteresis) and a programmable input OVP are provided, with an enable input offering a remote on or off control. The initial start-up VGS fault detection delay time, the transition VDS fault detection delay time, and the continuous over-current VDS fault detection delay time is programmed from a single capacitor. The MOSFET is latched off until either the enable input, or the UVLO input is toggled low and then high when a detected fault condition persists longer than the allowed fault delay time.