SN74HC112DR

Texas Instruments
595-SN74HC112DR
SN74HC112DR

Mfr.:

Description:
Flip-Flops Dual Neg-Edge-Trig J -K Flip-Flop A 595- A 595-SN74HC112D

ECAD Model:
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In Stock: 10.274

Stock:
10.274 Can Dispatch Immediately
Factory Lead Time:
6 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 2500)

Pricing (EUR)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™
1,18 € 1,18 €
0,719 € 7,19 €
0,605 € 15,13 €
0,458 € 45,80 €
0,396 € 99,00 €
0,347 € 173,50 €
0,312 € 312,00 €
Full Reel (Order in multiples of 2500)
0,267 € 667,50 €
0,234 € 1.755,00 €
† A MouseReel™ fee of 5,00 € will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable.

Alternative Packaging

Mfr. Part No.:
Packaging:
Tube
Availability:
In Stock
Price:
1,41 €
Min:
1

Similar Product

Texas Instruments SN74HC112D
Texas Instruments
Flip-Flops Dual
End of Life: Scheduled for obsolescence and will be discontinued by the manufacturer.

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Flip-Flops
RoHS:  
J-K Type Flip-Flop
HC
2 Circuit
CMOS
SOIC-Narrow-16
CMOS, LVTTL
Inverting/Non-Inverting
125 ns
- 4 mA
4 mA
2 V
6 V
SMD/SMT
- 40 C
+ 85 C
Reel
Cut Tape
MouseReel
Brand: Texas Instruments
Number of Input Lines: 2
Number of Output Lines: 3 Line
Product Type: Flip Flops
Series: SN74HC112
Factory Pack Quantity: 2500
Subcategory: Logic ICs
Unit Weight: 141,700 mg
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TARIC:
8542399000
CNHTS:
8542399000
CAHTS:
8542390000
USHTS:
8542390090
JPHTS:
8542390990
MXHTS:
8542399999
ECCN:
EAR99

SN74HC112 Dual J-K Flip-Flops

Texas Instruments SN74HC112 Dual J-K Flip-Flops contain two independent J-K negative-edge-triggered flip-flops. A low level at the clear (/CLR) inputs or preset (/PRE) resets or sets the outputs, no matter the levels of the other inputs. The data at the J and K inputs that meet the setup time requirements are transferred to the outputs on the negative-going edge of the clock (CLK) pulse when /CLR and /PRE are inactive (high). Clock triggering is not directly related to the fall time of the CLK pulse and occurs at a voltage level. The J and K input data may be changed without affecting the levels at the outputs following the hold-time interval. The Texas Instruments SN74HC112 are versatile flip-flops that perform as toggle flip-flops by tying J and K high.