LS2044AXN711B

NXP Semiconductors
771-LS2044AXN711B
LS2044AXN711B

Mfr.:

Description:
Microprocessors - MPU Layerscape 64-bit Arm Cortex-A72, Quad-core, 2.1GHz, -40 to 105C, Security disabled

ECAD Model:
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Availability

Stock:
Non-Stocked
Factory Lead Time:
39 Weeks Estimated factory production time.
Long lead time reported on this product.
Minimum: 21   Multiples: 21
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:
This Product Ships FREE

Pricing (EUR)

Qty. Unit Price
Ext. Price
369,52 € 7.759,92 €

Product Attribute Attribute Value Select Attribute
NXP
Product Category: Microprocessors - MPU
RoHS:  
ARM Cortex A72
4 Core
64 bit
2.1 GHz
FCPBGA-1292
48 kB
32 kB
1.05 V
LS2044A
SMD/SMT
- 40 C
+ 105 C
Tray
Brand: NXP Semiconductors
Data RAM Size: 128 kB
Interface Type: Ethernet, I2C, PCI-e, Serial, USB
L2 Cache Instruction / Data Memory: 2 x 1 MB
Memory Type: DDR4 SDRAM
Moisture Sensitive: Yes
Number of Timers/Counters: 4 Timer
Processor Series: QorIQ LS2044A
Product Type: Microprocessors - MPU
Factory Pack Quantity: 21
Subcategory: Microprocessors - MPU
Tradename: QorIQ
Watchdog Timers: No Watchdog Timer
Part # Aliases: 935371383557
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Compliance Codes
TARIC:
8542319000
CNHTS:
8542319091
USHTS:
8542310045
ECCN:
3A991.a.1
Origin Classifications
Country of Origin:
Korea, Republic of
Assembly Country of Origin:
Korea, Republic of
Country of Diffusion:
Taiwan
The country is subject to change at the time of shipment.

Layerscape Architecture

NXP Layerscape Architecture is the underlying system architecture of the QorIQ® LS series processors. The architecture enables next-generation networks with up to 100Gb/s performance and enhanced packet processing capabilities. Design effort is simplified with a standard, open programming model and a software-aware architecture framework. This design enables customers to fully exploit the underlying hardware for maximum optimization, with the capability to easily adapt to network changes for real-time soft control over the network. A uniform hardware and software model provides the compatibility and scalability required for designing end-to-end networking equipment from home-to carrier-class products. The core-agnostic architecture incorporates the optimum core for the given application: Arm® cores or Power Architecture® cores.